"<pre>
module P2085A

title 'P2085A'

"Version 1"

"[10-FEB-16] Based on P2082A03 firmware for Bar Head. Change command receiver"
"to data receiver."

"Version 2"

"[22-MAR-17] We prevent more than one of the TX1-TX15 lines being asserted at"
"the same time, regardless of the state of DA0-DA15, having found that with an"
"80-m cable, the A2085A powers up with DA0-DA15 in a random state half the time"
"when we turn on and off the LWDAQ device power supplies."

"Version 3"

"[09-JAN-19] With da_delay = 7 and dda_delay = 16 in our production nSW versions"
"of this board, we find that the delay SA to DA is 94 ns, which is sligthly out"
"of the LWDAQ 125+-25 ns permitted range, and SA to DDA is 221 ns, which is within"
"the range 250+-50 ns. We change da_delay to 9 and SA to DA is 120 ns. We implement"
"the test pins for the first time, sending SA, DA, and DDA to TP1..3 so we can measure"
"the delays."

declarations

"Constants"
da_delay = 9; "CK periods to DA"
dda_delay = 16; "CK periods to DDA"
run_time = dda_delay+3; "CK periods to run"

"Inputs"
A pin 99; "LVDS Input"

"Outputs"
TP1..TP3 pin 28, 36, 48 istype 'com';
TX1..TX15 pin 100, 86, 85, 91, 92, 
  93, 94, 97, 84, 81, 80, 79, 78, 
  72, 98 istype 'com';

"Command Receiver Nodes"
SA node istype 'reg'; "Synchronized A"
DSA node istype 'reg'; "Delayed SA"
DA node istype 'reg'; "Delayed A Rising Edge"
DDA node istype 'reg'; "Delayed DA"
AA node istype 'reg'; "Address Active"
CA node istype 'reg'; "Command Active"
ER,Q1..Q16 node istype 'reg'; "Receiver Bits"
LT4..LT0 node istype 'reg'; "LWDAQ Timer"
lt = [LT4..LT0];
DS node istype 'com'; "Data Strobe"
DC1..DC16 node istype 'reg';"Device Command Bits"
DA0..DA15 node istype 'reg';"Device Address Bits"

"Ring Oscillator Notes"
RO1,RO2 node istype 'com,keep'; "Ring Oscillator"
CK node istype 'reg,keep'; "Clock"
RUN node istype 'reg,keep';
equations 


"Clock Generation"
"----------------"

"The RUN flag controls the ring oscillator. When the ring"
"oscillator runs, it causes lt to increment. When lt reaches"
"a threshold, we clear the RUN flag."
RUN.aclr = (lt == run_time);
RUN := 1;
RUN.clk = A;

"Here we generate our clock with a ring oscillator."
"The ring oscillator consists of two combinatorial gates."
RO1 = RO2;
RO2 = !RO1 & RUN;
CK.clk = RO1;
CK:=!CK;


"Command and Address Decoding"
"----------------------------"

"This LWDAQ receiver uses the 40-MHz data clock to generate"
"the DA and DDA signals. We synchronise the incoming serial"
"logic signal, A, with the data clock."


"We synchronize A with DCK, and provide a delayed"
"version of A that allows us to detect edges."
[SA,DSA].clk = CK;
SA := A;
DSA := SA;

"This timer allows us to generate the Delayed A (DA)"
"and Double-Delayed A (DDA) signals for serial reception."
lt.clk = CK;
lt.aclr = !RUN;
lt := lt+1;
DA.clk = !CK;
DA := (lt==da_delay);
DDA.clk = !CK;
DDA := (lt==dda_delay);

"The command or address bits enter a sixteen-bit shift register."
[ER,Q1..Q16].clk = DA;
[ER,Q1..Q16] := [SA,ER,Q1..Q15];

"Address Active, or AA, provides a pulse that begins with DDA"
"on the start bit of an address transmission, and ends with DDA"
"on the stop bit of an address transmission. We clock the receiver"
"bits into the address register on a rising edge of AS."
AA.clk = DDA;
AA := (!AA & !CA & !SA & !ER) # (AA & !SA);
[DA0..DA15].clk = !AA;
[DA0..DA15] := [Q1..Q16];

"Command Active, or CA, provides a pulse that begins with DDA"
"on the start bit of a command transmission, and ends with DDA"
"on the stop bit of a command transmission. We clock the receiver"
"bits into the command register on a rising edge of CS."
CA.clk = DDA;
CA := (!AA & !CA & !SA & ER) # (CA & !SA);
[DC1..DC16].clk = !CA;
[DC1..DC16] := [Q1..Q16];

"Data Strobe identifies a solitary low pulse on A. A"
"solitary low pulse, combined with DTX, indicates that"
"the drivers is expecting this device to upload eight"
"bits of data."
DS = DDA & SA & !AA & !CA;


"Address Bit Allocation"
"----------------------"

TX1 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]);
TX2 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0]);
TX3 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0]);
TX4 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0]);
TX5 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0]);
TX6 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0]);
TX7 = ([DA15..DA0] == [0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0]);
TX8 = ([DA15..DA0] == [0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0]);
TX9 = ([DA15..DA0] == [0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0]);
TX10 = ([DA15..DA0] == [0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0]);
TX11 = ([DA15..DA0] == [0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0]);
TX12 = ([DA15..DA0] == [0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0]);
TX13 = ([DA15..DA0] == [0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0]);
TX14 = ([DA15..DA0] == [0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0]);
TX15 = ([DA15..DA0] == [1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]);


"Test Points"
"-----------"

TP1 = SA;
TP2 = DA;
TP3 = DDA;


end